Technical Co-Sponsors

IEEE IEEE CS

Technical Committee on Parallel Processing

Conferece Sponsors

Xilinx SoC-e
Intel

Media Sponsor
FPGA Central

Academic Sponsor
MKP

Organizing Committee


General Chair
René Cumplido, INAOE, Mexico

Program co-Chairs
Peter Athanas, Virginia Tech, USA
Jürgen Becker, Karlsruhe Institute of Technology, Germany

Publicity co-Chairs
Lesley Shannon, Simon Fraser University, Canada
Lionel Torres, LIRMM, France
Elías Todorovich, UNICEN, Argentina

Proceedings Chair
Claudia Feregrino, INAOE, Mexico

Tracks co-Chairs
Ali Akoglu, University of Arizona, USA
Khaled Benkrid, University of Edinburgh, UK
Christophe Bobda, University of Arkansas, USA
Joao Cardoso, University of Porto, Portugal
Paul Chow, University of Toronto, Canada
Viktor Fischer, University of Saint Etienne, France
Kris Gaj, George Mason University, USA
Diana Göhringer, Fraunhofer-Institute, Germany
Michael Hübner, Karlsruhe Institute of Technology, Germany
Loďc Lagadec, University of Western Brittany, France
Jürgen Teich, University of Erlangen-Nuremberg, Germany
Marco D. Santambrogio, MIT, USA
Ron Sass, UNC-Charlotte, USA

Program Committee



General Sessions

Rafael Arce, University of Puerto Rico, Puerto Rico
Armando Astarloa, University of the Basque Country, Spain
Peter Athanas, Virginia Tech, USA
Donald Bailey, Massey University, New Zealand
Zachary Baker, Los Alamos National Laboratory, USA
Jürgen Becker, Karlsruhe Institute of Technology, Germany
Pascal Benoit, University of Montpellier 2, France
Neil Bergmann, Queensland University, Australia
Christian Bertin, ST Microelectronics, France
Thomas Buechner, IBM, Germany
Oswaldo Cadenas, University of Reading, UK
Fabio Campi, ST Microelectronics Italy
Ning Chen, SandForce, USA
René Cumplido, INAOE, Mexico
Omkar Dandekar, Intel, USA
Debatosh Debnath, Oakland University, USA
Adam Donlin, Xilinx, USA
Hossam El Gindy, University of New South Wales, Australia
Claudia Feregrino, INAOE, Mexico
Marcio Fernandes, Federal University of Sao Carlos, Brazil
Jorge Finochietto, University of Cordoba, Argentina
Christian Hochberger, TU Dresden, Germany
Thomas Hollstein, Tallinn University of Technology, Estonia
Eddie Hung, University of British Columbia, Canada
Andrés García, ITESM, Mexico
Bernard Girau, LORIA-INRIA, France
Guy Gogniat, University of Southern Brittany, France
Marek Gordon, AGH University of Science and Technology, Poland
Yongfeng Gu, Mathworks, USA
Eddie Hung, University of British Columbia, Canada
Masahiro Iida, Kumamoto University, Japan
Alex Jones, University of Pittsburgh, USA
Paris Kitsos, Hellenic Open University, Greece
Andreas Koch, TU Darmstadt, Germany
Dominique Lavenier, IRISA / CNRS, France
Jasús Lázaro, University of the Basque Country, Spain
Jaehwan Lee, Indiana University-Purdue University, USA
Guy Lemieux, University of British Columbia, Canada
Carlos Llanos, University of Brasilia, Brazil
Sergio Lopez-Buedo, Autonomous University of Madrid, Spain
Yufeng Lu, Bradley University, USA
Patrick Lysaght, Xilinx, USA
Terrence Mak, Newcastle University, UK
Hariyama Masanori, Tohoku University, Japan
William Marnane, University College Cork, Ireland
Eduardo Marques, University of São Paulo, Brazil
Daniel Mesquita, Federal University of Uberlândia, Brazil
José Ignacio Martínez, Rey Juan Carlos University, Spain
Hariyama Masanori, Tohoku University, Japan
Tulika Mitra, National University of Singapore, Singapore
Manuel Moreno, Polytechnic University of Catalunia, Spain
Fearghal Morgan, NUI Galway, Ireland
Carlos Morra, Siemens
Koji Nakano, Hiroshima University, Japan
Christopher Neely, Xilinx, USA
Jose Nunez-Yanez, Universty of Bristol, UK
Fernando Osorio, University of Sao Paulo, Brazil
Fernando Pardo, University of Valencia, Spain
Ranjani Parthasarathi, Anna University, India
Katarina Paulsson, Ericsson AB, Sweden
Marco Platzner, University of Paderborn, Germany
Viktor Prasanna, University of Southern California, USA
René Romero-Troncoso, University of Guanajuato, Mexico
Lukas Sekanina, Brno University of Technology. Czech Republic
Sakir Sezer, Queen's University of Belfast, UK
Asadollah Shahbahrami, Delft University of Technology, The Netherlands
Hayden So, The University of Hong Kong, Hong Kong
Leonel Sousa, Technical University of Lisboa, Portugal
Evangelos Stefatos, INASCO Hellas, Greece
Gustavo Sutter, Autonomous University of Madrid, Spain
Gianluca Tempesti, University of York, UK
Christof Teuscher, Portland State University, USA
Arnaud Tisserand, University of Rennes, France
Elias Todorovich, UNICEN, Argentina
Cesar Torres, Cinvestav, Mexico
Lionel Torres, University of Montpellier 2, France
Jerry Trahan, Louisiana State University, USA
Andres Upegui, HEIG-VD, Switzerland
Ramachandran Vaidyanathan, Louisiana State University, USA
Carlos Valderrama, Faculty of Engineering, Mons, Belgium
Wim Vanderbauwhede, University of Glasgow, UK
Milan Vasilko, Aeon Experts, UK
Klaus Waldschmi, Frankfurt University
Denis Wolf, University of Sao Paulo, Brazil


Track on High Performance Reconfigurable Computing

Syed Zahid Ahmed, University of Montpellier 2, France
Jeff Allred, Stone Ridge Technology, USA
Jason Bakos, University of South Carolina, USA
Paul Chow, University of Toronto, Canada
Luis Gomes, UNINOVA, Portugal
Volodymyr Kindratenko, University of Illinois at Urbana-Champaign, USA
Loic Lagadec, Universite de Bretagne Occidentale, France
Herman Lam, University of Florida, USA
Martin Margala, University of Massachusetts Lowell, USA
Grag Peterson, University of Tennessee, USA
Ron Sass, UNC-Charlotte, USA
Gilles Sassatelli, University of Motpellier 2, France
Andrew Schmidt, University of Southern California, USA
Melissa Smith, Clemson University, USA
Yann Thoma, Swiss Federal Institute of Technology, Switzerland


Track on Reconfigurable Computing for Security and Cryptography

Octavian Cret, Technical University of Cluj-Napoca, Romania
Milos Drutarovsky, Technical University of Kosice, Slovakia
Reouven Elbaz, Intel, USA
Claudia Feregrino, INAOE, Mexico
Viktor Fischer, Université de Saint Etienne, France
Kris Gaj, George Mason University, USA
Benedikt Gierlichs, Katholieke Universiteit Leuven, Belgium
Guy Gogniat, Bretagne-Sud University, France
Jorge Guajardo, Philips Research, NL
Sylvain Guilley, Institut TELECOM, France
Tim Güneysu, Ruhr-University Bochum, Germany
Miaoqing Huang, University of Arkansas, USA
Akashi Satoh, AIST, Japan
Erkay Savas, Sabanci University, Turkey
Patrick Schaumont, Virginia Tech, USA
Steve Trimberger, Xilinx, USA
Berna Ors, Istanbul Technical University, Turkey
Michal Varchola, Technical University of Košice, Slovak Republic


Track on Reconfigurable Computing for DSP and Communications

Ali Ahmadinia, Glasgow Caledonian University, UK
Zachary Baker, Los Alamos National Laboratory, USA
Christophe Bobda, University of Arkansas, USA
Christos Bouganis, Imperial College, UK
Gabriel Caffarena, University San Pablo CEU Madrid, Spain
Ray Cheung, UCLA, USA
Stephen Craven, University of Tennessee
Scott Harper, Luna Innovations, USA
Irwin Kennedy, Alcatel Lucent - Bell Labs Ireland
Christophe Moy, Institute of Electronics and Telecommunications of Rennes, France
Gilles Pokam, Intel, USA
Jürgen Teich, University of Erlangen-Nuremberg, Germany
Jim Torrensen, University of Oslo, Norway
Daniel Ziener, University of Erlangen-Nuremberg, Germany


Track on Multiprocessor Systems and Networks on Chip

Manfred Glesner, Technische Univ. Darmstadt, Germany
Diana Goehringer, Fraunhofer FOM, Germany
Kees Goossens, NXP Semiconductors / Corporate I&T, The Netherlands
Reiner Hartenstein, TU Kaiserslautern, Germany
Michael Huebner, Karlsruhe Institute of Technology, Germany
Gabriel Marchesan Almeida, LIRMM, France
Fernando Moraes, PUCRS, Brazil
Thilo Pionteck, University of Lübeck, Germany
Brian Veale, IBM, USA
Gerard Smit, University of Twente, The Netherlands
Walter Stechele, Technical University of Munich, Germany
Norbert Wehn, TU Kaiserslautern, Germany


Track on Reconfiguration Techniques

Hideharu Amano, Keio University, Japan
Fabio Cancare, Politecnico di Milano, Italy
Joao Cardoso, University of Porto, Portugal
Pedro Diniz, USC Information Sciences Institute, USA
Joăo Canas Ferreira, University of Porto, Portugal
Pao-Ann Hsiung, National Chung Cheng University, Taiwan
Markus Koester, University of Paderborn, Germany
Yana Krasteva, Polytechnic University of Valencia, Spain
Philip H.W. Leong, University of Sydney, Australia
Cameron Patterson, Virgina Tech, USA
Mario Porrmann, University of Paderborn, Germany
Christian Plessl, University of Paderborn, Germany
Marco Santambrogio, MIT, USA
Donatella Sciuto, Politecnico di Milano, Italy
Pete Sedcole, Viotech Communications, France
Dirk Stroobandt, Ghent University, Ghent, Belgium
Tom VanCourt, Altera, USA
Stephan Wong, TU Delft, The Netherlands


Productivity Environments and High Level Languages

Loďc Lagadec, University of Western Brittany, France
Philippe Coussy, University of Southern Brittany, France
Ulrich Heinkel, Chemnitz University of Technology, Germany
Fabrice Lemonnier, Thales, France
Dimitrios Soudris, National Technical University of Athens, Greece
Brad Hutchings, Brigham Young University, USA
Roger Woods, Queen's University of Belfast, UK


Controversy Track: FPGAs Vs GPUs

Ali Akoglu, University of Arizona, USA
Jason Bakos, University of South Carolina, USA
Khaled Benkrid, University of Edinburgh, UK
Esam El-Araby, The Catholic University of America, USA
Tarek El-Ghazawi, George Washington University, USA
Haohuan Fu, Tsinghua University, China
Dan Ghica, The University of Birmingham, UK
Walid Najjar, University of California at Riverside, USA
Smail Niar, Universite de Valenciennes, France
Miquel Pericŕs, Barcelona Supercomputing Center,Spain
Bertil Schmidt, Nanyang Technological University, Singapore
Yuichiro Shibata, Nagasaki University, Japan
David Thomas, Imperial College, UK
Kuen Tsoi, Imperial College, UK